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A method based on a modulo scheduling algorithm for software pipelining has been recently proposed to optimize
 

Summary: Abstract
A method based on a modulo scheduling algorithm for
software pipelining has been recently proposed to optimize
clocked circuits. The resulting circuits are multi-phase
clocked circuits, where all clocks have the same period. To
preserve the functionality of the original circuit, registers
must be placed after minimizing the clock period. The
placement of these registers is derived from an arbitrary
schedule determined during a clock period minimization
step. A good schedule may allow to decrease the number of
registers and the number of phases needed in the final
circuit. Decreasing the number of registers contributes to
minimizing the area occupied by the circuit and reduces its
power consumption; while decreasing the number of phases
reduces the complexity of the clock generation and
distribution tasks. In this paper, we propose polynomial-
time-solvable methods to choose a good schedule once the
clock period is minimized. The methods have been tested on
a subset of the ISCAS89 benchmarks. Experimental results
show that the number of registers which must be inserted in

  

Source: Aboulhamid, El Mostapha - Département d'Informatique et recherche opérationnelle, Université de Montréal

 

Collections: Engineering