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Energy-Exposed Instruction Set Architectures Krste Asanovic
 

Summary: Energy-Exposed Instruction Set Architectures
Krste Asanovi´c
MIT Laboratory for Computer Science, Cambridge, MA 02139
krste@mit.edu
1 Introduction
Power consumption is emerging as a key factor limit-
ing computational performance in both mobile and teth-
ered systems. Although there has been significant progress
in low-power circuit design and low-power CAD and some
work in low-power microarchitectures, there has been lit-
tle work to date at the level of instruction set architecture
(ISA) design for low power computing.
Modern ISAs such as RISC or VLIW are based on
extensive research into the effects of instruction set de-
sign on performance, and provide a purely performance-
oriented hardware-software interface. These instruction
sets avoid features that would impede a high-performance
implementation. They also avoid providing alternate ways
to perform the same task unless it will increase perfor-
mance significantly. Implementations of these ISAs per-

  

Source: Asanovic, Krste - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)

 

Collections: Computer Technologies and Information Sciences