Home

About

Advanced Search

Browse by Discipline

Scientific Societies

E-print Alerts

Add E-prints

E-print Network
FAQHELPSITE MAPCONTACT US


  Advanced Search  

 
AN FPGA-BASED IMPLEMENTATION OF SPATIO-TEMPORAL OBJECT SEGMENTATION Kumara Ratnayake and Aishy Amer
 

Summary: AN FPGA-BASED IMPLEMENTATION OF SPATIO-TEMPORAL OBJECT SEGMENTATION
Kumara Ratnayake and Aishy Amer
Concordia University, Electrical and Computer Engineering,
Montreal, Quebec, Canada
Email: [k ratnay, amer]@ece.concordia.ca
ABSTRACT
This paper proposes a robust real-time, scalable and modular Field
Programmable Gate Array (FPGA) based implementation of a spatio-
temporal segmentation of video objects. The goal of this work is to
translate an existing object segmentation algorithm into hardware
to achieve real-time performance. The proposed implementation
achieved an optimum processing speed of 133 MPixels/s while uti-
lizing minimal hardware resources. The design was successfully
simulated, synthesized and tested for real-time performance on an
actual hardware platform which consists of a frame grabber with a
user programmable FPGA - Xilinx Virtex-II Pro.
Index Terms-- Image segmentation, Field programmable gate
arrays, Video signal processing
1. INTRODUCTION
Object segmentation plays a key role in many video processing ap-

  

Source: Amer, Aishy - Department of Electrical and Computer Engineering, Concordia University

 

Collections: Engineering