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Low Power System-on-Chip Platform Architecture for High Performance Applications
 

Summary: 1
Low Power System-on-Chip Platform Architecture for
High Performance Applications
W.-C. Lo1
, A.T. Erdogan2
and T. Arslan1,2
1
Institute for System Level Integration, The ALBA Campus,
Livingston, EH64 7BH, Scotland, United Kingdom.
2
University of Edinburgh,
Department of Electronics & Electrical Engineering,
Edinburgh EH9 3JL, Scotland, United Kingdom.
Abstract: This paper describes work on the development of a scheme for implementation
of low power high performance Digital Signal Processing intensive AMBA
based System-On-Chip platforms. The scheme is based on a novel interfacing
scheme which utilises the bus hierarchy within AMBA in order to allow single
and multiple high performance DSP Intellectual Property cores to be
integrated into the SoC platform. The paper describes the overall AMBA SoC
architecture, the integration scheme, and an SoC generic wrapper which allows

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering