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Summary: Memory Coherence Activity Prediction in
Commercial Workloads
Stephen Somogyi, Thomas F. Wenisch, Nikolaos Hardavellas,
Jangwoo Kim, Anastassia Ailamaki, Babak Falsafi
Computer Architecture Laboratory (CALCM)
Carnegie Mellon University, Pittsburgh, PA 15213
http://www.ece.cmu.edu/~puma2/
Abstract. Recent research indicates that prediction-based coherence optimi-
zations offer substantial performance improvements for scientific applica-
tions in distributed shared memory multiprocessors. Important commercial
applications also show sensitivity to coherence latency, which will become
more acute in the future as technology scales. Therefore it is important to in-
vestigate prediction of memory coherence activity in the context of commer-
cial workloads.
This paper studies a trace-based Downgrade Predictor (DGP) for predicting
last stores to shared cache blocks, and a pattern-based Consumer Set Predic-
tor (CSP) for predicting subsequent readers. We evaluate this class of predic-
tors for the first time on commercial applications and demonstrate that our
DGP correctly predicts 47%-76% of last stores. Memory sharing patterns in
commercial workloads are inherently non-repetitive; hence CSP cannot at-
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