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Single-Version STMs can be Multi-Version Permissive (Extended Abstract)

Summary: Single-Version STMs can be Multi-Version Permissive
(Extended Abstract)
Hagit Attiya1,2
and Eshcar Hillel1
Department of Computer Science, Technion
Ecole Polytechnique Federale de Lausanne (EPFL)
Abstract. We present PermiSTM, a single-version STM that satisfies a practical
notion of permissiveness, usually associated with keeping many versions: it never
aborts read-only transactions, and it aborts other transactions only due to a con-
flicting transaction (which writes to a common item), thereby avoiding spurious
aborts. It avoids unnecessary contention on the memory, being strictly disjoint-
access parallel.
1 Introduction
Transactional memory is a leading paradigm for programming concurrent applications
for multicores. It is seriously considered as part of software solutions (abbreviated
STMs) and as a basis for novel hardware designs, which exploit the parallelism of-
fered by contemporary multicores and multiprocessors. A transaction encapsulates a
sequence of operations on a set of data items: it is guaranteed that if a transaction com-


Source: Attiya, Hagit - Department of Computer Science, Technion, Israel Institute of Technology


Collections: Computer Technologies and Information Sciences