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Summary: Shielding Against Design Flaws
with Field Repairable Control Logic
Ilya Wagner Valeria Bertacco Todd Austin
Advanced Computer Architecture Lab, The University of Michigan Ann Arbor, MI
{iwagner,valeria,austin}@umich.edu
ABSTRACT
Correctness is a paramount attribute of any microproces-
sor design; however, without novel technologies to tame
the increasing complexity of design verification, the amount
of bugs that escape into silicon will only grow in the fu-
ture. In this paper, we propose a novel hardware patch-
ing mechanism that can detect design errors which escaped
the verification process, and can correct them directly in
the field. We accomplish this goal through a simple field-
programmable state matcher, which can identify erroneous
configurations in the processor's control state and switch the
processor into formally-verified degraded performance mode,
once a "match" occurs. When the instructions exposing the
design flaw are committed, the processor is switched back to
normal mode. We show that our approach can detect and
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