Summary: Balanced Redundancy Utilization in Embedded Memory Cores for
Dependable Systems
M. Choi and N. Park
Dept. of CS
Oklahoma State University
Stillwater, OK 74078-1053
choim@a.cs.okstate.edu
npark@a.cs.okstate.edu
F. Lombardi and Y.B. Kim
Dept. of ECE
Northeastern University
Boston, MA 02115
lombardi@ece.neu.edu
ybk@ece.neu.edu
V. Piuri
Dept. of IT
University of Milan
Bramante 65, 26013
Crema (CR), Italy
piuri@dti.unimi.it

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

Collections: Engineering