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Summary: Unbounded Transactional Memory
C. Scott Ananian Krste Asanovi´c Bradley C. Kuszmaul Charles E. Leiserson Sean Lie
MIT Computer Science and Artificial Intelligence Laboratory
The Stata Center, 32 Vassar St., Cambridge, MA 02139
{cananian,krste,bradley,cel,sean lie}@mit.edu
Abstract
Hardware transactional memory should support un-
bounded transactions: transactions of arbitrary size and
duration. We describe a hardware implementation of un-
bounded transactional memory, called UTM, which ex-
ploits the common case for performance without sacri-
ficing correctness on transactions whose footprint can be
nearly as large as virtual memory. We performed a cycle-
accurate simulation of a simplified architecture, called
LTM. LTM is based on UTM but is easier to implement,
because it does not change the memory subsystem outside
of the processor. LTM allows nearly unbounded transac-
tions, whose footprint is limited only by physical memory
size and whose duration by the length of a timeslice.
We assess UTM and LTM through microbenchmark-
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