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Appears in Dependable Systems and Networks (DSN), July 2001 We propose a fault-tolerant approach to reliable micropro-
 

Summary: Appears in Dependable Systems and Networks (DSN), July 2001
Abstract
We propose a fault-tolerant approach to reliable micropro-
cessor design. Our approach, based on the use of an on-line
checker component in the processor pipeline, provides signifi-
cant resistance to core processor design errors and opera-
tional faults such as supply voltage noise and energetic
particle strikes. We show through cycle-accurate simulation
and timing analysis of a physical checker design that our
approach preserves system performance while keeping area
overheads and power demands low. Furthermore, analyses
suggest that the checker is a fairly simple state machine that
can be formally verified, scaled in performance, and reused.
Further simulation analyses show virtually no performance
impacts when our simple checker design is coupled with a
high-performance microprocessor model. Timing analyses
indicate that a fully synthesized unpipelined 4-wide checker
component in 0.25um technology is capable of checking Alpha
instructions at 288 MHz. Physical analyses also confirm that
costs are quite modest; our prototype checker requires less

  

Source: Austin, Todd M. - Department of Electrical Engineering and Computer Science, University of Michigan

 

Collections: Engineering; Computer Technologies and Information Sciences