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The Raw Microprocessor: A Computational Fabric for Software Circuits and General Purpose Programs
 

Summary: The Raw Microprocessor:
A Computational Fabric for Software Circuits and General Purpose Programs
Michael Bedford Taylor, Jason Kim, Jason Miller, David Wentzlaff,
Fae Ghodrat, Ben Greenwald, Henry Hoffman, Jae-Wook Lee, Paul Johnson, Walter Lee,
Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen,
Matt Frank, Saman Amarasinghe, and Anant Agarwal
Laboratory for Computer Science
Massachusetts Institute of Technology
The Raw microprocessor consumes 122 million transistors, executes 16 different load, store, inte-
ger or floating point instructions every cycle, controls 25 GB/s of I/O bandwidth, and has 2 MB of
on-chip, distributed L1 SRAM memory, providing on-chip memory bandwidth of 43 GB/s. Is this
the latest billion-dollar 3,000 man-year processor effort? In fact, Raw was designed and imple-
mented by a handful of graduate students who had little or no experience in microprocessor
implementation.
Our research addresses a key technological problem for microprocessor architects today: how to
leverage growing quantities of chip resources even as wire delays become substantial.
In this article, we demonstrate how the Raw research prototype uses a scalable ISA to attack the
emerging wire delay problem by providing a parallel, software interface to the gate, wire, and pin
resources of the chip.
We argue that an architecture that has direct, first class analogues to all of these physical resources

  

Source: Amarasinghe, Saman - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)

 

Collections: Computer Technologies and Information Sciences