Home

About

Advanced Search

Browse by Discipline

Scientific Societies

E-print Alerts

Add E-prints

E-print Network
FAQHELPSITE MAPCONTACT US


  Advanced Search  

 
IMPLEMENTATION OF THE DECORRELATING TRANSFORMATION FOR LOW POWER FIR FILTERS
 

Summary: IMPLEMENTATION OF THE DECORRELATING TRANSFORMATION FOR
LOW POWER FIR FILTERS
A.T. Erdogan, T. Arslan, and R. Lai
School of Engineering and Electronics, The University of Edinburgh
The King's Buildings, Edinburgh EH9 3JL, United Kingdom.
{ate,arslan}@ee.ed.ac.uk
ABSTRACT
This paper presents the implementation of the
decorrelating (DECOR) transformation technique for low
power FIR filtering cores. The technique was introduced
in the past, but was not fully evaluated for its area, delay
and power performance. Early evaluations did not
consider the whole implementation and were merely based
on either some analytical methods or high level simulation
models. This paper presents the complete VLSI
implementation of the technique and a study of its area,
delay and power performance with different order of
coefficient differences and various multiplier types. We
show that although the technique achieves up to 47%
power saving in the multiplier unit, the overall power

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering