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L2 Cache to Off-chip Memory Networks for Chip Multiprocessors by Carrell D Killebrew
 

Summary: L2 Cache to Off-chip Memory Networks for Chip Multiprocessors
by Carrell D Killebrew
Research Project
Submitted to the Department of Electrical Engineering and Computer Sciences,
University of California at Berkeley, in partial satisfaction of the requirements for
the degree of Master of Science, Plan II.
Approval for the Report and Comprehensive Examination:
Committee:
Professor Krste Asanovic
Research Advisor
(Date)
* * * * * * *
Professor John Kubiatowicz
Second Reader
(Date)
L2 Cache to Off-chip Memory Networks for Chip Multiprocessors
Copyright Spring 2008
by
Carrell D Killebrew
i

  

Source: Asanovic, Krste - Computer Science and Artificial Intelligence Laboratory & Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)

 

Collections: Computer Technologies and Information Sciences