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An Improved Analytical Superscalar Microprocessor Memory Model

Summary: An Improved Analytical Superscalar Microprocessor
Memory Model
Xi E. Chen Tor M. Aamodt
Department of Electrical and Computer Engineering
University of British Columbia, Vancouver, BC, CANADA
As the number of transistors that can be integrated onto a
single chip continues to increase exponentially, a growing
challenge is modeling performance with reasonable accuracy
in the early stages of processor design. While methodolo-
gies for execution driven simulations are well understood,
comparatively little is known about how to develop accurate
analytical models. Processor architects in industry have oc-
casionally employed ad hoc analytical modeling techniques in
an attempt to rapidly focus the search for higher performance
designs. Moreover, analytical models can provide insights
that a detailed performance simulator may not. This pa-
per proposes techniques to accurately model the performance
impact of long latency data cache misses in a superscalar


Source: Aamodt, Tor - Department of Electrical and Computer Engineering, University of British Columbia


Collections: Engineering; Computer Technologies and Information Sciences