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Multiple-bus multiprocessor under unbalanced trac M.A. Sayeeda

Summary: Multiple-bus multiprocessor under unbalanced trac
M.A. Sayeeda
, M. Atiquzzamanb,
Cabletron Systems, 50 Minuteman Road, Andover, MA 01810, USA
Department of Electrical and Computer Engineering, Univeristy of Dayton, Dayton, OH 45469-0226, USA
Received 6 January 1998; received in revised form 31 July 1998; accepted 25 August 1998
Performance evaluation of multiple-bus multiprocessor systems is usually carried out under the
assumption of uniform memory reference model. Hot spots arising in multiprocessor systems due to the
use of shared variables, synchronization primitives, etc. give rise to non-uniform memory reference
pattern. The objective of this paper is to study the performance of multiple bus multiprocessor system in
the presence of hot spots. Analytical expressions for the average memory bandwidth and probability of
acceptance of prioritized processors have been derived. Two new phenomenon, coined as bumping and
knee eect, have been observed in the acceptance probabilities of the processors. The results are
validated by simulation results. # 1999 Elsevier Science Ltd. All rights reserved.
Keywords: Interconnection networks; Performance evaluation; Memory bandwidth; Blocking probability; Multipro-
cessors; Parallel processing


Source: Atiquzzaman, Mohammed - School of Computer Science, University of Oklahoma


Collections: Computer Technologies and Information Sciences