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Abstract--A mutation-based validation paradigm that can han-dle complete high-level microprocessor implementations is pre-
 

Summary: 1
Abstract--A mutation-based validation paradigm that can han-
dle complete high-level microprocessor implementations is pre-
sented. First, a control-based coverage measure is presented that is
aimed at exposing design errors that incorrectly set control signal
values. A method of automatically generating a complete set of
modeled errors from this coverage metric is presented such that the
instantiated modeled errors harness the rules of cause-and-effect
that define mutation-based error models. Finally, we introduce a
new automatic test pattern generation technique for high-level
hardware descriptions that solves multiple concurrent constraints
and is empowered by concurrent programming.
1 INTRODUCTION
The task of creating a validation paradigm is an open-ended
problem. An enormous amount of research has already been per-
formed to study the sub-topics that are incorporated into a valida-
tion system including coverage metrics, design error modeling,
finite state machine (FSM) analysis, equivalence checking at vari-
ous layers of abstraction, and various automatic test pattern genera-
tion (ATPG) techniques. Validation systems for high-level

  

Source: Al-Asaad, Hussain - Department of Electrical and Computer Engineering, University of California, Davis

 

Collections: Computer Technologies and Information Sciences