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A LOW COST WAFER-LEVEL MEMS PACKAGING TECHNOLOGY Pejman Monajemi, Paul J. Joseph*
 

Summary: A LOW COST WAFER-LEVEL MEMS PACKAGING TECHNOLOGY
Pejman Monajemi, Paul J. Joseph*
, Paul A. Kohl*
, and Farrokh Ayazi
School of Electrical and Computer Engineering, *School of Chemical and Biomolecular Engineering
Georgia Institute of Technology, Atlanta, GA 30332-0250
ABSTRACT
This paper presents a low-cost low-temperature packaging
technique for wafer-level encapsulation of MEMS devices
fabricated on any arbitrary substrate. The packaging process
presented here does not involve wafer bonding and can be
applied to a wide variety of MEMS devices after their
fabrication sequence is completed. Our technique utilizes
thermal decomposition of a sacrificial polymeric material
through a polymer overcoat cap, and can be applied to both
surface and bulk micromachined structures. Encapsulation
of high-Q silicon-on-insulator resonators, and thick silicon
gyroscopes and accelerometers are presented.
I. INTRODUCTION
Wafer-level packaging represents a challenging and costly

  

Source: Ayazi, Farrokh - School of Electrical and Computer Engineering, Georgia Institute of Technology

 

Collections: Engineering