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A Low-Power and Domain-Specific Reconfigurable FFT Fabric for System-on-Chip Applications
 

Summary: A Low-Power and Domain-Specific Reconfigurable FFT Fabric for
System-on-Chip Applications
Yutian Zhao1
, Ahmet T. Erdogan1,2
and Tughrul Arslan1,2
1
University of Edinburgh, School of Engineering and Electronics
Edinburgh, EH9 3JL, Scotland, United Kingdom
2
Institute for System Level Integration, The ALBA Campus
Livingston, EH54 7EG, Scotland, United Kingdom
Y.Zhao@ed.ac.uk, Ahmet.Erdogan@ee.ed.ac.uk, Tughrul.Arslan@ee.ed.ac.uk
Abstract
A low-power dynamic reconfigurable FFT fabric is
proposed in this paper. The architecture is served as a
scalable IP Core which is suitable for System on Chip
applications. The system can be configured as 16, 32, 64,
128, 256, 512 and 1024-point FFT. Compared with a
conventional ASIC FFT processor, this FFT fabric is
characterized by having dynamic reconfigurability while

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering