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Summary: Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays
Wing On Fung1
, Tughrul Arslan1, 2
, Sami Khawam1
School of Electronics and Engineering1
University of Edinburgh, King's Buildings, Mayfield
Road, Edinburgh, EH9 3JL, UK
Institute for System Level Integration2
The Alba Centre, Alba Campus
Livingston, EH54 7EG, UK
wing.fung@ed.ac.uk, tughrul.arslan@ed.ac.uk, sami.khawam@ed.ac.uk
Abstract
Domain-specific reconfigurable arrays have shown to
provide an efficient trade-off between flexibility of FPGA
and performance of ASIC circuit. Nonetheless, the design
of these heterogeneous arrays is a labour intensive
process. Furthermore, the manual creation of the array
architecture could not have been fully optimised, hence
limiting their performance. This paper presents a
placement technique for mapping logic elements into
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