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The complexity of planarity testing Eric Allender
 

Summary: The complexity of planarity testing
Eric Allender
Dept. of Computer Science,
Rutgers University,
Piscataway, NJ, USA.
Email: allender@cs.rutgers.edu
Meena Mahajan
The Institute of Mathematical Sciences,
Chennai 600 113, INDIA.
Email: meena@imsc.ernet.in
August 25, 2003
Abstract
We clarify the computational complexity of planarity testing, by showing that pla-
narity testing is hard for L, and lies in SL. This nearly settles the question, since it
is widely conjectured that L = SL [Sak96]. The upper bound of SL matches the lower
bound of L in the context of (nonuniform) circuit complexity, since L/poly is equal to
SL/poly.
Similarly, we show that a planar embedding, when one exists, can be found in FLSL.
Previously, these problems were known to reside in the complexity class AC1, via
a O(log n) time CRCW PRAM algorithm [RR94], although planarity checking for

  

Source: Allender, Eric - Department of Computer Science, Rutgers University

 

Collections: Computer Technologies and Information Sciences