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1 A Case for Intelligent RAM: IRAM (To appear in IEEE Micro, April 1997) A Case for Intelligent RAM: IRAM

Summary: 1 A Case for Intelligent RAM: IRAM (To appear in IEEE Micro, April 1997)
A Case for Intelligent RAM: IRAM
David Patterson, Thomas Anderson, Neal Cardwell, Richard Fromm,
Kimberly Keeton, Christoforos Kozyrakis, Randi Thomas, and Katherine Yelick
Computer Science Division/EECS Department
University of California, Berkeley CA 94720-1776
email: patterson@cs.berkeley.edu
Abstract: Two trends call into question the current practice of microprocessors and DRAMs being fabricated
as different chips on different fab lines: 1) the gap between processor and DRAM speed is growing at 50%
per year; and 2) the size and organization of memory on a single DRAM chip is becoming awkward to use in
a system, yet size is growing at 60% per year. Intelligent RAM, or IRAM, merges processing and memory
into a single chip to lower memory latency, increase memory bandwidth, and improve energy efficiency as
well as to allow more flexible selection of memory size and organization. In addition, IRAM promises sav-
ings in power and board area. This paper reviews the state of microprocessors and DRAMs today, explores
some of the opportunities and challenges for IRAMs, and finally estimates performance and energy effi-
ciency of three IRAM designs.
1. Introduction and Why there is a Problem
The division of the semiconductor industry into microprocessor and memory camps pro-
vides many advantages. First and foremost, a fabrication line can be tailored to the needs


Source: Anderson, Tom - Department of Computer Science and Engineering, University of Washington at Seattle
Zakhor, Avideh - Department of Electrical Engineering and Computer Sciences, University of California at Berkeley


Collections: Computer Technologies and Information Sciences; Engineering