To appear in the Proceedings of the 1990 International Conference on Parallel Processing
Implementing Sequential Consistency In CacheBased Systems +
Sarita V. Adve
Mark D. Hill
Computer Sciences Department
University of Wisconsin
Madison, Wisconsin 53706
A model for sharedmemory systems commonly
(and often implicitly) assumed by programmers is that
of sequential consistency. For implementing sequential
consistency in a cachebased system, it is widely
believed that (1) implementing strong ordering is
sufficient and (2) restricting a processor to one shared
memory reference at a time is practically necessary.
In this paper we show that both beliefs are false.
First, we prove that (1) is false with a counterexample.
Second, we argue that (2) is false by giving sufficient
conditions and an implementation that allow a processor