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Polylogarithmic Concurrent Data Structures from Monotone James Aspnes
 

Summary: Polylogarithmic Concurrent Data Structures from Monotone
Circuits
James Aspnes
Hagit Attiya
Keren Censor-Hillel
March 1, 2011
Abstract
The paper presents constructions of useful concurrent data structures, including max registers and
counters, with step complexity that is sublinear in the number of processes, n. This result avoids a well-
known lower bound by having step complexity that is polylogarithmic in the number of values the object
can take or the number of operations applied to it.
The key step in these implementations is a method for constructing a max register, a linearizable,
wait-free concurrent data structure that supports a write operation and a read operation that returns the
largest value previously written. For fixed m, an m-valued max register is constructed from one-bit
multi-writer multi-reader registers at a cost of at most log m atomic register operations per write or
read. An unbounded max register is constructed with cost O(min(log v, n)) to read or write a value v.
Max register are used to transform any monotone circuit into a wait-free concurrent data structure
that provides write operations setting the inputs to the circuit and a read operation that returns the value
of the circuit on the largest input values previously supplied. One application is a simple, linearizable,
wait-free counter with a cost of O(min(log n log v, n)) to perform an increment and O(min(log v, n))

  

Source: Aspnes, James - Department of Computer Science, Yale University

 

Collections: Computer Technologies and Information Sciences