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, , 1{19 () c Kluwer Academic Publishers, Boston. Manufactured in The Netherlands.

Summary: , , 1{19 ()
c Kluwer Academic Publishers, Boston. Manufactured in The Netherlands.
Latency Hiding on COMA Multiprocessors
TAREK S. ABDELRAHMAN tsa@eecg.toronto.edu
Department of Electrical and Computer Engineering
The University of Toronto
Toronto, Ontario, Canada M5S 3G4
Received May 1, 1991
Abstract. Cache-onlymemory access (COMA) multiprocessorssupportscalable coherentshared
memory with a uniform memory access programming model. The local portion of shared memory
associated with a processor is organized as a cache. This cache-based organization of memory
results in long remote memory access latencies. Latency-hiding mechanisms can reduce e ective
remote memory access latency by making data present in a processor's local memory by the time
the data are needed. In this paper we study the e ectiveness of latency-hiding mechanisms on
the KSR2 multiprocessor in improving the performance of three programs. The communication
patternsof each program are analyzedand the mechanisms for latencyhiding are applied. Results
from a 52-processorsystem indicatethat thesemechanisms hidea signi cantportionof the latency
of remote memory accesses. The results also quantify bene ts in overall applicationperformance.
Keywords: Cache-only memory access (COMA) multiprocessors, latency hiding, prefetching,


Source: Abdelrahman, Tarek S. - Department of Electrical and Computer Engineering, University of Toronto


Collections: Computer Technologies and Information Sciences