 
Summary: Sequential Optimisation without State Space Exploration
A Mehrotra \Lambda S Qadeer \Lambda V Singhal + A Aziz # R K Brayton \Lambda A L SangiovanniVincentelli \Lambda
Abstract
We propose an algorithm for area optimisation of sequential
circuits through redundancy removal. The algorithm finds
compatible redundancies by implying values over nets in the
circuit. The potentially exponential cost of state space traver
sal is avoided and the redundancies found can all be removed
at once. The optimised circuit is a safe delayed replacement of
the original circuit. The algorithm computes a set of compati
ble sequential redundancies and simplifies the circuit by prop
agating them through the circuit. We demonstrate the efficacy
of the algorithm even for large circuits through experimental
results on benchmark circuits.
1 Introduction
Sequential optimisation seeks to replace a given sequential cir
cuit with another one optimised with respect to some criterion
 area, performance or power, in a way such that the environ
ment of the circuit cannot detect the replacement. In this work,
we deal with the problem of optimising sequential circuits for
