A FAST AND STALLFREE MEMORY
ACCESS FOR FFT COMPUTATIONS
Mokhtar A. Aboelaze *
Department of Computer Science
4700 Keele st.
N.York, Ontario M3P 1J3 CANADA
tel: (416) 7365053 ext 33947
Performing a 2D FFT in real time require designing special purpose VLSI chips. One of
the major problems in designing special purpose VLSI chips is to match the processor speed and
the memory speed. Advanced pipelining and multiprocessing techniques have enabled us to
shorten the processor cycle (pipeline cycle) beyond the limit, any memory chip can handle.
In this paper, we propose a method to allocate the N 2 points on an 2D image to m memory
modules in order to guarantee a stallfree access to the data in calculating 2D FFT, even when
the memory is m times slower than the processor. Our technique depends on accessing the
memory modules in a round robin fashion, and generating the appropriate twiddle factor and
memory address for every point accessed. Generation of the appropriate twiddle factors, and the