Summary: LABS 1
VH DL D e s i g n Fl o w
L AB 1
Familiarize yourself with the Design Analyzer and Behavioral Compilation. The design we'll
work on is a FIR with 9 TAPs described in VHDL.
An FIR is simply a sliding dot product.
O(i) = K1*I(i-8) + K2*I(i-7) + K3*(i-6) + ... + K9*I(i)
where O is the output vector, I is the input vector and Kx are the factors
of the kernel (which are constants).
1. cd to your subdirectory day1.
2. Explore the VHDL code
3. To start the Design Analyzer, type: startsynopsys-3.4b
4. Analyze the design that we want to work on:
select the file fir.vhd and click OK (you can double-click on fir.vhd as a shortcut).
5. Go to Help/Commands...
Enter "elaborate" as Command Name then click Lookup Topic.
Which option specifies to include informations for the Behavioral Compiler?