ABSTRACT--Low power flip-flops are crucial for the design of
low-power digital systems. In this paper we delve into the details of
flip-flop design and optimization for low power. We compare the
lowest power flip-flops reported in the literature and introduce a
new flip-flop that competes with them.
As the feature size of CMOS technology process shrinks accord-
ing to Moore's Law, designers are able to integrate more transistors
onto the same die. The more transistors there are the more switch-
ing and the more power dissipated in the form of heat or radiation.
Heat is one of the most important packaging challenges in this era;
it is one of the main drivers of low power design methodologies and
practices. Another mover of low power research is the reliability of
the integrated circuit. More switching implies higher average cur-
rent is flowing and therefore the probability of reliability issues
The most important prime mover of low power research and
design is our convergence to a mobile society. We are moving from
desktops to laptops to handhelds and smaller computing systems.