Summary: Coping With Very High Latencies in Petaflop
Computer Systems
Sean Ryan, Jos'e N. Amaral, Guang Gao, Zachary Ruiz, Andres Marquez,
Kevin Theobald ?
Computer Architecture and Parallel Systems Laboratory, University of Delaware,
Newark, DE, USA. http://www.capsl.udel.edu
The very long and highly variable latencies in the deep memory hierarchy of a
petaflop­scale architecture design, such as the Hybrid Technology Multi­Threaded Ar­
chitecture (HTMT) [13], present a new challenge to its programming and execution
model. A solution to coping with such high and variable latencies is to directly and
explicitly expose the different memory regions of the machine to the program execu­
tion model, allowing better management of communication. In this paper we describe
the novel percolation model that lies at the heart of the HTMT program execution
model [13]. The Percolation Model combines multithreading with dynamic prefetch­
ing of coarse­grain contexts. In the past, prefetching techniques have concentrated on
moving blocks of data within the memory hierarchy. Instead of only moving contiguous
blocks of data, the thread percolation approach manages contexts that include data,
program instructions, and control states.
The main contributions of this paper include the specification of the HTMT runtime
execution model based on the concept of percolation, and a discussion of the role of the

Source: Amaral, José Nelson - Department of Computing Science, University of Alberta

Collections: Computer Technologies and Information Sciences