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Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC
 

Summary: Architecture of a Dynamically Reconfigurable NoC for Adaptive
Reconfigurable MPSoC
B. Ahmad1
, Ahmet T. Erdogan1
, Sami Khawam1
1: School of Electronics & Engineering
University of Edinburgh, King's Buildings,
Mayfield Rd, Edinburgh, EH9 3JL, UK
b.ahmad@ed.ac.uk
Abstract
This paper describes the architecture of our
dynamically reconfigurable Network-on-Chip (NoC)
architecture that has been proposed for reconfigurable
Multiprocessor system-on-chip (MPSoC), as a solution
to the increased communication needs, low silicon
cost, Quality of Service and scalability of network in
mind. The novelty of the proposed NoC lies in the fact
that it dynamically configures itself with respect to
routing, switching and data packet size with the
changing communication requirements of the system at

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering