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A Multi-objective Genetic Algorithm for On-chip Real-time Optimisation of Word Length and Power Consumption in a Pipelined FFT Processor
 

Summary: 1
A Multi-objective Genetic Algorithm for On-chip Real-time Optimisation
of Word Length and Power Consumption in a Pipelined FFT Processor
targeting a MC-CDMA Receiver
Nasri Sulaiman1
and Tughrul Arslan1,2
1
School of Engineering and Electronics
The University of Edinburgh, King's Buildings
Mayfield Road, Rdinburgh, EH9, 3JL, UK
2
Institute for System Level Integration
The Alba Centre, Alba Campus
Livingston, EH54 7EG, UK.
N.Sulaiman@ed.ac.uk, T.Arslan@ee.ed.ac.uk.
Abstract
This paper presents a multi-objective Genetic Algorithm for
on-chip real-time optimisation of word length and power
consumption in a fixed-point pipelined Fast Fourier
Transform (FFT) processor targeting on MC-CDMA

  

Source: Arslan, Tughrul - School of Engineering and Electronics, University of Edinburgh

 

Collections: Engineering