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Summary: Dynamically Matching ILP Characteristics Via a Heterogeneous Clustered
Microarchitecture
Lei Chen, David H. Albonesi, Steven Dropsho
Department of Electrical and Computer Engineering
Department of Computer Science
University of Rochester
Rochester, NY 14627
Abstract
Applications vary in the degree of instruction level par-
allelism (ILP) available to be exploited by a superscalar
processor. The ILP can also vary significantly within an
application. On one end of the microarchitecture space
are monolithic superscalar designs that exploit parallelism
within an application. At another end of the spectrum are
clustered architectures having many simple cores that can
be clocked at a higher frequency than a comparable mono-
lithic design. A disadvantage of the clustered design is the
cost to transmit results between clusters which potentially
limits the performance even in high ILP applications if in-
structions are not mapped carefully to minimize cross com-
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