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A Low Power 8T SRAM Cell Design technique for Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi
 

Summary: A Low Power 8T SRAM Cell Design technique for
CNFET
Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi
Dept. of Electrical and Computer Engineering
Northeastern University
Boston, USA
{youngbok, ybk, Lombardi}@ece.neu.edu
Young Jun Lee
NextChip Corp.
Seoul, Korea
yjlee@nextchip.com
Abstract-- In this paper, a new SRAM cell design based on
Carbon Nanotube Field-Effect Transistor (CNFET) technology is
proposed. Carbon nanotube with their superior transport
properties, excellent thermal conductivities, and high current
handling capacities has proved to be a promising alternative
device to the conventional CMOS. The proposed SRAM cell
design on CNFET is compared with SRAM cell designs
implemented with the conventional CMOS and FinFET in terms
of speed, power consumption, stability, and leakage current in

  

Source: Ayers, Joseph - Marine Science Center & Department of Biology, Northeastern University

 

Collections: Engineering