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Power Token Balancing: Adapting CMPs to Power Constraints for Parallel Multithreaded Workloads
 

Summary: Power Token Balancing: Adapting CMPs to Power Constraints
for Parallel Multithreaded Workloads
Juan M. Cebrián, Juan L. Aragón
Dept. of Computer Engineering,
University of Murcia, Murcia, Spain
{jcebrian,jlaragon}@ditec.um.es
Stefanos Kaxiras
Dept. of Information Technology,
University of Uppsala, Uppsala, Sweden
stefanos.kaxiras@it.uu.se
Abstract--In the recent years virtually all processor
architectures employ multiple cores per chip (CMPs). It is
possible to use legacy (i.e., single-core) power saving techniques
in CMPs which run either sequential applications or
independent multithreaded workloads. However, new
challenges arise when running parallel shared-memory
applications. In the later case, sacrificing some performance in
a single core (thread) in order to be more energy-efficient
might unintentionally delay the rest of cores (threads) due to
synchronization points (locks/barriers), therefore, harming the

  

Source: Aragón Alcaraz, Juan Luis - Departamento de Ingenieria y Tecnologia de Computadores, Universidad de Murcia

 

Collections: Computer Technologies and Information Sciences