A LOW POWER FIR FILTERING CORE
A. T. Erdogan, M. Hasan and T. Arslan
University of Edinburgh,
Department of Electronics & Electrical Engineering,
Edinburgh EH9 3JL, Scotland, United Kingdom.
The authors present a DSP core for low power
implementation of FIR filters. The core is based on direct
form realisation of FIR digital filters and processes filter
coefficients in a non-conventional order. The paper
describes the architecture of the core and the
implementation of its key components. An overall power
reduction of up to 17% is obtained as compared to the
conventional filtering cores. A power profile of the main
contributing blocks in the core is also provided.
One of the fastest growing areas in the computing
industry is the provision of high throughput DSP systems