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Summary: SWIFT: Software Implemented Fault Tolerance
George A. Reis Jonathan Chang Neil Vachharajani Ram Rangan David I. August
Departments of Electrical Engineering and Computer Science
Princeton University
Princeton, NJ 08544
{gareis, jcone, nvachhar, ram, august}@princeton.edu
Abstract
To improve performance and reduce power, processor
designers employ advances that shrink feature sizes, lower
voltage levels, reduce noise margins, and increase clock
rates. However, these advances make processors more
susceptible to transient faults that can affect correctness.
While reliable systems typically employ hardware tech-
niques to address soft-errors, software techniques can pro-
vide a lower-cost and more flexible alternative. This paper
presents a novel, software-only, transient-fault-detection
technique, called SWIFT. SWIFT efficiently manages re-
dundancy by reclaiming unused instruction-level resources
present during the execution of most programs. SWIFT also
provides a high level of protection and performance with an
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