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StressTest: An Automatic Approach to Test Generation Via Activity Monitors
 

Summary: StressTest: An Automatic Approach to Test Generation Via
Activity Monitors
Ilya Wagner Valeria Bertacco Todd Austin
Advanced Computer Architecture Lab
The University of Michigan Ann Arbor, MI
{iwagner,valeria,austin}@umich.edu
ABSTRACT
The challenge of verifying a modern microprocessor design is
an overwhelming one: Increasingly complex micro-architec-
tures combined with heavy time-to-market pressure have
forced microprocessor vendors to employ immense verifica-
tion teams in the hope of finding the most critical bugs in a
timely manner. Unfortunately, too often size doesn't seem
to matter for verification teams, as design schedules continue
to slip and microprocessors find their way to the marketplace
with design errors. In this paper, we describe a simulation-
based random test generation tool, called StressTest, that
provides assistance in locating hard-to-find corner-case de-
sign bugs and performance problems. StressTest is based on
a Markov-model-driven random instruction generator with

  

Source: Austin, Todd M. - Department of Electrical Engineering and Computer Science, University of Michigan

 

Collections: Engineering; Computer Technologies and Information Sciences