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The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors
 

Summary: The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA
Multiprocessors
Manuel E. Acacio, Jos´e Gonz´alezİ
, Jos´e M. Garc´ia and Jos´e DuatoŞ
Universidad de Murcia, Spain. E-mail: meacacio,jmgarcia @ditec.um.es
İIntel Barcelona Research Center, Intel Labs, Barcelona. E-mail: josex.gonzalez.gonzalez@intel.com
ŞUniversidad Polit´ecnica de Valencia, Spain. E-mail: jduato@gap.upv.es
Abstract
This work is focused on accelerating upgrade misses in
cc-NUMA multiprocessors. These misses are caused by
store instructions for which a read-only copy of the line
is found in the L2 cache. Upgrade misses require a mes-
sage sent from the missing node to the directory, a direc-
tory lookup in order to find the set of sharers, invalida-
tion messages being sent to the sharers and responses to
the invalidations being sent back. Therefore, the penalty
paid by these misses is not negligible, mainly if we con-
sider that they account for a high percentage of the total
miss rate. We propose the use of prediction as a means of
providing cc-NUMA multiprocessors with a more efficient

  

Source: Acacio, Manuel - Departamento de Ingenieria y Tecnologia de Computadores, Universidad de Murcia

 

Collections: Computer Technologies and Information Sciences