Bibliographic Citation
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|---|---|
| Title | Packet-switched intercommunication network for distributed memory, parallel processor computers |
| Creator/Author | Napolitano, L.M. Jr. |
| Publication Date | 1990 Dec 31 |
| OSTI Identifier | OSTI ID: 10187400; Legacy ID: DE93002002 |
| Report Number(s) | PATENTS-US--A7660503 |
| DOE Contract Number | AC04-76DP00789 |
| Other Number(s) | Other: ON: DE93002002 |
| Resource Type | Patent Application |
| Resource Relation | Other Information: PBD: 1990 |
| Research Org | Sandia National Labs., Albuquerque, NM (United States) |
| Sponsoring Org | USDOE, Washington, DC (United States) |
| Subject | 99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; COMPUTER NETWORKS; DESIGN; ARRAY PROCESSORS; DISTRIBUTED DATA PROCESSING; COMMUNICATIONS; INVENTIONS |
| Description/Abstract | The Lambda network is a single stage, packet-switched interprocessor communication network for a distributed memory, parallel processor computer. Its design arises from the desired network characteristics of minimizing mean and maximum packet transfer time, local routing, expandability, deadlock avoidance, and fault tolerance. The network is based on fixed degree nodes and has O(log{sub 2n}) mean and maximum packet transfer distances where n is the number of processors. The routing method is detailed, as are methods for expandability, deadlock avoidance, and fault tolerance. |
| Country of Publication | United States |
| Language | English |
| Format | Medium: X; Size: 44 p. |
| Availability | OSTI; NTIS; GPO Dep. |
| Rights | Patent Assignee: Dept. of Energy |
| System Entry Date | 2008 Feb 12 |
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