Planarization of metal films for multilevel interconnects
Abstract
In the fabrication of multilevel integrated circuits, each metal layer is anarized by heating to momentarily melt the layer. The layer is melted by sweeping laser pulses of suitable width, typically about 1 microsecond duration, over the layer in small increments. The planarization of each metal layer eliminates irregular and discontinuous conditions between successive layers. The planarization method is particularly applicable to circuits having ground or power planes and allows for multilevel interconnects. Dielectric layers can also be planarized to produce a fully planar multilevel interconnect structure. The method is useful for the fabrication of VLSI circuits, particularly for wafer-scale integration.
- Inventors:
-
- Livermore, CA
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- OSTI Identifier:
- 866316
- Patent Number(s):
- 4681795
- Assignee:
- United States of America as represented by Department of Energy (Washington, DC)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC Y10S - TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- DOE Contract Number:
- W-7405-ENG-48
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- planarization; metal; films; multilevel; interconnects; fabrication; integrated; circuits; layer; anarized; heating; momentarily; melt; melted; sweeping; laser; pulses; suitable; width; typically; microsecond; duration; increments; eliminates; irregular; discontinuous; conditions; successive; layers; method; particularly; applicable; ground; power; planes; allows; dielectric; planarized; produce; planar; interconnect; structure; useful; vlsi; wafer-scale; integration; metal films; multilevel interconnects; dielectric layers; metal film; dielectric layer; laser pulses; particularly applicable; metal layer; laser pulse; integrated circuits; integrated circuit; successive layers; suitable width; vlsi circuits; successive layer; sweeping laser; wafer-scale integration; power planes; planar multilevel; planarization method; multilevel integrated; multilevel interconnect; microsecond duration; momentarily melt; interconnect structure; eliminates irregular; layer eliminates; discontinuous conditions; /428/427/
Citation Formats
Tuckerman, David B. Planarization of metal films for multilevel interconnects. United States: N. p., 1987.
Web.
Tuckerman, David B. Planarization of metal films for multilevel interconnects. United States.
Tuckerman, David B. Thu .
"Planarization of metal films for multilevel interconnects". United States. https://www.osti.gov/servlets/purl/866316.
@article{osti_866316,
title = {Planarization of metal films for multilevel interconnects},
author = {Tuckerman, David B},
abstractNote = {In the fabrication of multilevel integrated circuits, each metal layer is anarized by heating to momentarily melt the layer. The layer is melted by sweeping laser pulses of suitable width, typically about 1 microsecond duration, over the layer in small increments. The planarization of each metal layer eliminates irregular and discontinuous conditions between successive layers. The planarization method is particularly applicable to circuits having ground or power planes and allows for multilevel interconnects. Dielectric layers can also be planarized to produce a fully planar multilevel interconnect structure. The method is useful for the fabrication of VLSI circuits, particularly for wafer-scale integration.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Thu Jan 01 00:00:00 EST 1987},
month = {Thu Jan 01 00:00:00 EST 1987}
}
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