System, methods and apparatus for program optimization for multi-threaded processor architectures
Abstract
Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
- Inventors:
- Issue Date:
- Research Org.:
- Reservoir Labs, Inc., New York, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1167014
- Patent Number(s):
- 8930926
- Application Number:
- 12/762,281
- Assignee:
- Reservoir Labs, Inc. (New York, NY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- FG02-08ER85149
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2010 Apr 16
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING
Citation Formats
Bastoul, Cedric, Lethin, Richard A., Leung, Allen K., Meister, Benoit J., Szilagyi, Peter, Vasilache, Nicolas T., and Wohlford, David E. System, methods and apparatus for program optimization for multi-threaded processor architectures. United States: N. p., 2015.
Web.
Bastoul, Cedric, Lethin, Richard A., Leung, Allen K., Meister, Benoit J., Szilagyi, Peter, Vasilache, Nicolas T., & Wohlford, David E. System, methods and apparatus for program optimization for multi-threaded processor architectures. United States.
Bastoul, Cedric, Lethin, Richard A., Leung, Allen K., Meister, Benoit J., Szilagyi, Peter, Vasilache, Nicolas T., and Wohlford, David E. Tue .
"System, methods and apparatus for program optimization for multi-threaded processor architectures". United States. https://www.osti.gov/servlets/purl/1167014.
@article{osti_1167014,
title = {System, methods and apparatus for program optimization for multi-threaded processor architectures},
author = {Bastoul, Cedric and Lethin, Richard A. and Leung, Allen K. and Meister, Benoit J. and Szilagyi, Peter and Vasilache, Nicolas T. and Wohlford, David E.},
abstractNote = {Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jan 06 00:00:00 EST 2015},
month = {Tue Jan 06 00:00:00 EST 2015}
}
Save to My Library
You must Sign In or Create an Account in order to save documents to your library.
Works referenced in this record:
Cross-Product Refactoring Apparatus and Method
patent-application, June 2010
- Huang, Wei; Klicnik, Vladimir; Lo, Grace Hai Yan
- US Patent Application 12/339615; 20100162225
Synthesizing transformations for locality enhancement of imperfectly-nested loop nests
conference, January 2000
- Ahmed, Nawaaz; Mateev, Nikolay; Pingali, Keshav
- Proceedings of the 14th international conference on Supercomputing - ICS '00
A Compiler Framework for Tiling Imperfectly-Nested Loops
book, January 2000
- Song, Yonghong; Li, Zhiyuan; Goos, Gerhard
- Languages and Compilers for Parallel Computing
Normalised Givens rotations for recursive least squares processing
conference, January 1995
- McWhirter, J. G.; Walke, R. L.; Kadlec, J.
- VLSI Signal Processing, VIII
Flow-insensitive interprocedural alias analysis in the presence of pointers
book, June 2005
- Burke, Michael; Carini, Paul; Choi, Jong-Deok
- Languages and Compilers for Parallel Computing, p. 234-250
Counting Integer Points in Parametric Polytopes Using Barvinok's Rational Functions
journal, February 2007
- Verdoolaege, Sven; Seghir, Rachid; Beyls, Kristof
- Algorithmica, Vol. 48, Issue 1
Array-data flow analysis and its use in array privatization
conference, January 1993
- Maydan, Dror E.; Amarasinghe, Saman P.; Lam, Monica S.
- Proceedings of the 20th ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '93
A fast algorithm for finding dominators in a flowgraph
journal, January 1979
- Lengauer, Thomas; Tarjan, Robert Endre
- ACM Transactions on Programming Languages and Systems, Vol. 1, Issue 1
Method and system for reordering the instructions of a computer program to optimize its execution
patent, December 1999
- Heisch, Randall Ray
- US Patent Document 6,006,033
Data transformations for streaming applications on multiprocessors
patent-application, March 2007
- Liao, Shih-wei; Du, Zhaohui; Wu, Gansha
- US Patent Application 11/234484; 20070074195
Maximizing parallelism and minimizing synchronization with affine transforms
conference, January 1997
- Lim, Amy W.; Lam, Monica S.
- Proceedings of the 24th ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '97
Polyhedral Code Generation in the Real World
book, January 2006
- Vasilache, Nicolas; Bastoul, Cedric; Cohen, Albert
- Compiler Construction, p. 185-201
Enabling Loop Fusion and Tiling for Cache Performance by Fixing Fusion-Preventing Data Dependences
conference, January 2005
- Jingling Xue,
- 2005 International Conference on Parallel Processing (ICPP'05)
Adaptively weighted, partitioned context edit distance string matching
patent-application, February 2002
- Richardson, Alvin Charles; Davis, Charles Michael; Miranker, Daniel P.
- US Patent Application 09/915603; 20020021838
Optimal weighted loop fusion for parallel programs
conference, January 1997
- Megiddo, Nimrod; Sarkar, Vivek
- Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures - SPAA '97
Register tiling in nonrectangular iteration spaces
journal, July 2002
- Jiménez, Marta; Llabería, José M.; Fernández, Agustín
- ACM Transactions on Programming Languages and Systems, Vol. 24, Issue 4
Semi-Automatic Composition of Loop Transformations for Deep Parallelism and Memory Hierarchies
journal, June 2006
- Girbal, Sylvain; Vasilache, Nicolas; Bastoul, Cédric
- International Journal of Parallel Programming, Vol. 34, Issue 3
The Z-polyhedral model
conference, January 2007
- Gupta, Gautam; Rajopadhye, Sanjay
- Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '07
Speculative Code Motion for Memory Latency Hiding
patent-application, February 2009
- Li, Long; Dai, Jinquan; Lv, Zhiyuan
- US Patent Application 10/582519; 20090037889
Real-time document collection search engine with phrase indexing
patent, July 1999
- Kirsch, Steven T.; Chang, William; Miller, Ed
- US Patent Document 5,920,854
Variance Analysis for Translating Cuda code for Execution by a General Purpose Processor
patent-application, October 2009
- Grover, Vinod; Aarts, Bastiaan Joannes Matheus; Murphy, Michael
- US Patent Application 12/415090; 20090259997
Conversion of control dependence to data dependence
conference, January 1983
- Allen, J. R.; Kennedy, Ken; Porterfield, Carrie
- Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages - POPL '83
System and method for performing regular expression matching with high parallelism
patent, May 2007
- Gai, Silvano; Malagrino, Dante
- US Patent Document 7,225,188
Network surveillance using long-term and short-term statistical profiles to determine suspicious network activity
patent, September 2009
- Porras, Phillip A.; Valdes, Alfonso
- US Patent Document 7,594,260
Efficient string matching: an aid to bibliographic search
journal, June 1975
- Aho, Alfred V.; Corasick, Margaret J.
- Communications of the ACM, Vol. 18, Issue 6
Software pipelining: an effective scheduling technique for VLIW machines
journal, July 1988
- Lam, M.
- ACM SIGPLAN Notices, Vol. 23, Issue 7
Loop optimization with mapping code on an architecture
patent, August 2004
- Danckaert, Koen; Catthoor, Francky
- US Patent Document 6,772,415
Manufacturing cheap, resilient, and stealthy opaque constructs
conference, January 1998
- Collberg, Christian; Thomborson, Clark; Low, Douglas
- Proceedings of the 25th ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '98
System and method for identifying matches of query patterns to document text in a document textbase
patent, October 2000
- Masand, Brij M.
- US Patent Document 6,131,092
Pipelined Processor and Compiler/Scheduler for Variable Number Branch Delay Slots
patent-application, February 2010
- Van De Waerdt, Jan-Willem; Roos, Steven
- US Patent Application 12/518485; 20100050164
Methods And Systems To Detect An Evasion Attack
patent-application, August 2007
- Varghese, George; Bonomi, Flavio; Fingerhut, John
- US Patent Application 11/552025; 20070192861
Scanning polyhedra with DO loops
journal, July 1991
- Ancourt, Corinne; Irigoin, François
- ACM SIGPLAN Notices, Vol. 26, Issue 7
Method and apparatus for improving performance of a program using a loop interchange, loop distribution, loop interchange sequence
patent, March 2000
- Schooler, Richard
- US Patent Document 6,038,398
Static branch frequency and program profile analysis
conference, January 1994
- Wu, Youfeng; Larus, James R.
- Proceedings of the 27th annual international symposium on Microarchitecture - MICRO 27
The program dependence graph and its use in optimization
journal, July 1987
- Ferrante, Jeanne; Ottenstein, Karl J.; Warren, Joe D.
- ACM Transactions on Programming Languages and Systems, Vol. 9, Issue 3
Automatic mapping of nested loops to FPGAS
conference, January 2007
- Ramanujam, J.; Sadayappan, P.
- Proceedings of the 12th ACM SIGPLAN symposium on Principles and practice of parallel programming - PPoPP '07
Lattice-based memory allocation
conference, January 2003
- Darte, Alain; Schreiber, Rob; Villard, Gilles
- Proceedings of the international conference on Compilers, architectures and synthesis for embedded systems - CASES '03
Some efficient solutions to the affine scheduling problem. I. One-dimensional time
journal, October 1992
- Feautrier, Paul
- International Journal of Parallel Programming, Vol. 21, Issue 5, p. 313-347
Lattice-Based Memory Allocation
journal, October 2005
- Darte, A.; Schreiber, R.; Villard, G.
- IEEE Transactions on Computers, Vol. 54, Issue 10
Parallel Sparse Supports for Array Intrinsic Functions of Fortran 90
journal, March 2001
- Chang, Rong-Guey; Chuang, Tyng-Ruey; Lee, Jenq Kuen
- The Journal of Supercomputing, Vol. 18, Issue 3, p. 305-339
Tiling Imperfectly-nested Loop Nests
conference, January 2000
- Ahmed, N.; Mateev, N.; Pingali, K.
- ACM/IEEE SC 2000 Conference (SC'00)
System and method for optimizing operations via dataflow analysis
patent, February 2007
- Scales, Daniel J.
- US Patent Document 7,185,327
System and Method for Domain Stretching for an Advanced Dual-Representation Polyhedral Loop Transformation Framework
patent-application, December 2009
- Eichenberger, Alexandre E.; O'Brien, John K. P.; O'Brien, Kathryn M.
- US Patent Application 11/861503; 20090307673
An experimental evaluation of tiling and shackling for memory hierarchy management
conference, January 1999
- Kodukula, Induprakas; Pingali, Keshav; Cox, Robert
- Proceedings of the 13th international conference on Supercomputing - ICS '99
A Library for Doing Polyhedral Operations
journal, December 2000
- Wilde, Doran K.
- Parallel Algorithms and Applications, Vol. 15, Issue 3-4
Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints
conference, January 1977
- Cousot, Patrick; Cousot, Radhia
- Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages - POPL '77
Towards automatic generation of vulnerability-based signatures
conference, January 2006
- Brumley, D.; Newsome, J.; Song, D.
- 2006 IEEE Symposium on Security and Privacy (S&P'06)
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor
conference, December 2006
- Sankaralingam, Karthikeyan; Nagarajan, Ramadass; McDonald, Robert
- 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06)
Full regular expression search of network traffic
patent, October 2005
- Mathur, Alok; Beylin, Boris
- US Patent Document 6,952,694
Iterative modulo scheduling: an algorithm for software pipelining loops
conference, January 1994
- Rau, B. Ramakrishna
- Proceedings of the 27th annual international symposium on Microarchitecture - MICRO 27
On the Best Rank-1 and Rank-( R 1 , R 2 ,. . ., R N ) Approximation of Higher-Order Tensors
journal, January 2000
- De Lathauwer, Lieven; De Moor, Bart; Vandewalle, Joos
- SIAM Journal on Matrix Analysis and Applications, Vol. 21, Issue 4
Method and system for memory management optimization
patent-application, February 2004
- Schreiber, Robert S.
- US Patent Application 10/223224; 20040034754
Whole program path profiling
patent, December 2001
- Larus, James R.; Fraser, Christopher W.
- US Patent Document 6,327,699
Event Detection Method
patent-application, January 2008
- Cao, Bin; Wang, Yong
- US Patent Application 11/691155; 20080010680
Solving SAT and SAT Modulo Theories: From an abstract Davis--Putnam--Logemann--Loveland procedure to DPLL(
journal, November 2006
- Nieuwenhuis, Robert; Oliveras, Albert; Tinelli, Cesare
- Journal of the ACM, Vol. 53, Issue 6
Intrusion detection signature analysis using regular expressions and logical operators
patent, September 2004
- Shanklin, Steven D.; Bernhard, Thomas E.; Lathem, Gerald S.
- US Patent Document 6,792,546
Revisiting the decomposition of Karp, Miller and Winograd
conference, January 1995
- Darte, A.; Vivien, F.
- Proceedings The International Conference on Application Specific Array Processors
Bi-Directional Communication in a Parallel Processing Environment
patent-application, May 2009
- Stefansson, Halldor Narfi; Dean, Loren; Lurie, Roy
- US Patent Application 11/841861; 20090119677
Efficient data compression methods for multidimensional sparse array operations based on the ekmr scheme
journal, December 2003
- Chun-Yuan Lin,
- IEEE Transactions on Computers, Vol. 52, Issue 12
Early Control of Register Pressure for Software Pipelined Loops
book, January 2003
- Sid-Ahmed-Ali, Touati; Eisenbeis, Christine; Goos, Gerhard
- Compiler Construction
Some efficient solutions to the affine scheduling problem. Part II. Multidimensional time
journal, December 1992
- Feautrier, Paul
- International Journal of Parallel Programming, Vol. 21, Issue 6
Supernode partitioning
conference, January 1988
- Irigoin, F.; Triolet, R.
- Proceedings of the 15th ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '88
Effective partial redundancy elimination
conference, January 1994
- Briggs, Preston; Cooper, Keith D.
- Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation - PLDI '94
Background memory allocation for multi-dimensional signal processing
patent, April 1998
- Balasa, Florin; Catthoor, Francky; De Man, Hugo
- US Patent Document 5,742,814
Search apparatus and method using order pattern including repeating pattern
patent, June 2005
- Akaboshi, Naoki
- US Patent Document 6,912,526
System and method for creating systolic solvers
patent, August 2006
- Cronquist, Darren Charles; Schlansker, Michael
- US Patent Document 7,086,038
Information management and retrieval
patent, January 2002
- Weeks, Richard
- US Patent Document 6,338,057
Generation of Efficient Nested Loops from Polyhedra
journal, October 2000
- Quillere, Fabien; Rajopadhye, Sanjay; Wilde, Doran
- International Journal of Parallel Programming, Vol. 28, Issue 5, p. 469-498
Compiler Apparatus and Method for Optimizing Loops in a Computer Program
patent-application, May 2003
- Roediger, Robert Ralph; Schmidt, William Jon
- US Patent Application 09992324; 20030097652
Dataflow analysis of array and scalar references
journal, February 1991
- Feautrier, Paul
- International Journal of Parallel Programming, Vol. 20, Issue 1, p. 23-53
Non-literal textual search using fuzzy finite-state linear non-deterministic automata
patent, January 2000
- Hunter, Kenneth M.
- US Patent Document 6,018,735
The mapping of linear recurrence equations on regular arrays
journal, October 1989
- Quinton, Patrice; van Dongen, Vincent
- Journal of VLSI signal processing systems for signal, image and video technology, Vol. 1, Issue 2, p. 95-113
A Geometric Programming Framework for Optimal Multi-Level Tiling
conference, January 2004
- Renganarayana, L.; Rajopadhye, S.
- Proceedings of the ACM/IEEE SC2004 Conference
Value dependence graphs: representation without taxation
conference, January 1994
- Weise, Daniel; Crew, Roger F.; Ernst, Michael
- Proceedings of the 21st ACM SIGPLAN-SIGACT symposium on Principles of programming languages - POPL '94
Scalable Tensor Decompositions for Multi-aspect Data Mining
conference, December 2008
- Kolda, Tamara G.; Sun, Jimeng
- 2008 Eighth IEEE International Conference on Data Mining (ICDM)
Parallel programming computing system to dynamically allocate program portions
patent, January 2012
- Little, John N.; Hicklin, Joseph F.; Martin, Jocelyn Luke
- US Patent Document 8,108,845
Operator strength reduction
journal, September 2001
- Cooper, Keith D.; Simpson, L. Taylor; Vick, Christopher A.
- ACM Transactions on Programming Languages and Systems, Vol. 23, Issue 5
Loop allocation for optimizing compilers
patent, November 2003
- Archambault, Roch G.; Blainey, Robert J.
- US Patent Document 6,651,246
Parallel processing of distributed arrays and optimum data distribution
patent, August 2012
- Luszczek, Piotr R.; Little, John N.; Martin, Jocelyn Luke
- US Patent Document 8,250,550
A practical automatic polyhedral parallelizer and locality optimizer
journal, May 2008
- Bondhugula, Uday; Hartono, Albert; Ramanujam, J.
- ACM SIGPLAN Notices, Vol. 43, Issue 6
Code generation for multiple mappings
conference, January 1994
- Kelly, W.; Pugh, W.; Rosser, E.
- Proceedings Frontiers '95. The Fifth Symposium on the Frontiers of Massively Parallel Computation
Iterated register coalescing
journal, May 1996
- George, Lal; Appel, Andrew W.
- ACM Transactions on Programming Languages and Systems, Vol. 18, Issue 3
Constant propagation with conditional branches
journal, April 1991
- Wegman, Mark N.; Zadeck, F. Kenneth
- ACM Transactions on Programming Languages and Systems, Vol. 13, Issue 2
Binary state machine system and method for REGEX processing of a data stream in an intrusion detection system
patent, April 2005
- Carter, Earl Thomas
- US Patent Document 6,880,087
Solution and Optimization of Systems of Pseudo-Boolean Constraints
journal, October 2007
- Aloul, Fadi A.; Ramani, Arathi; Sakallah, Karem A.
- IEEE Transactions on Computers, Vol. 56, Issue 10
Blocking and array contraction across arbitrarily nested loops using affine partitioning
journal, July 2001
- Lim, Amy W.; Liao, Shih-Wei; Lam, Monica S.
- ACM SIGPLAN Notices, Vol. 36, Issue 7
Efficient representation scheme for multidimensional array operations
journal, March 2002
- Chun-Yuan Lin,
- IEEE Transactions on Computers, Vol. 51, Issue 3
Minimum-cost network hardening
patent-application, April 2006
- Noel, Steven E.; Jajodia, Sushil; O'Berry, Brian C.
- US Patent Application 11/250449; 20060085858
Global code motion/global value numbering
journal, June 1995
- Click, Cliff
- ACM SIGPLAN Notices, Vol. 30, Issue 6
Latency tolerant risc-based multiple processor with event driven locality managers resulting from variable tagging
patent, August 1995
- Casavant, Thomas L.; Fineberg, Samuel A.
- US Patent Document 5,442,797
Undecidability of static analysis
journal, December 1992
- Landi, William
- ACM Letters on Programming Languages and Systems, Vol. 1, Issue 4
Memory manager for heterogeneous memory control
patent-application, February 2007
- Sakarda, Premanand; Brandt, Todd; Wu, Hai Hua
- US Patent Application 11/196959; 20070033367
Selective code generation optimization for an advanced dual-representation polyhedral loop transformation framework
patent, December 2011
- Eichenberger, Alexandre E.; O'Brien, John Kevin Patrick; O'Brien, Kathryn M.
- US Patent Document 8,087,010
Adaptive transaction manager for complex transactions and business process
patent-application, April 2004
- McGoveran, David O.
- US Patent Application 10/263589; 20040068501
An Efficient Inclusion-Based Points-To Analysis for Strictly-Typed Languages
book, January 2002
- Whaley, John; Lam, Monica S.; Goos, Gerhard
- Static Analysis
Adaptive array beamforming with fixed-point arithmetic matrix inversion using Givens rotations
conference, November 2001
- Rabinkin, Daniel V.; Song, William; Vai, M. Michael
Method for execution of query to search strings of characters that match pattern with a target string utilizing bit vector
patent, August 2004
- Fritchman, Barry Lynn
- US Patent Document 6,785,677
Modification of swing modulo scheduling to reduce register usage
patent-application, March 2006
- Martin, Allan Russell
- US Patent Application 10/930039; 20060048123
On the (Im)possibility of Obfuscating Programs
book, January 2001
- Barak, Boaz; Goldreich, Oded; Impagliazzo, Rusell
- Advances in Cryptology — CRYPTO 2001
Symbolic array dataflow analysis for array privatization and program parallelization
conference, January 1995
- Gu, Junjie; Li, Zhiyuan; Lee, Gyungho
- Proceedings of the 1995 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing '95
Simultaneously searching for a plurality of patterns definable by complex expressions, and efficiently generating data for such searching
patent, August 2007
- Cheng, Paul; Chien, Fangli
- US Patent Document 7,260,558
Collecting and analyzing graphical data flow web application results from multiple users
patent, November 2012
- Austin, Paul F.; Kudukoli, Ramprasad
- US Patent Document 8,307,347
Partial dead code elimination
journal, June 1994
- Knoop, Jens; Rüthing, Oliver; Steffen, Bernhard
- ACM SIGPLAN Notices, Vol. 29, Issue 6
Configurable string matching hardware for speeding up intrusion detection
journal, March 2005
- Aldwairi, Monther; Conte, Thomas; Franzon, Paul
- ACM SIGARCH Computer Architecture News, Vol. 33, Issue 1
Memory optimization by counting points in integer transformations of parametric polytopes
conference, January 2006
- Seghir, Rachid; Loechner, Vincent
- Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems - CASES '06
System and method for regular expression matching using index
patent, June 2004
- Cho, Junghoo; Rajagopalan, Sridhar
- US Patent Document 6,754,650
Generating efficient parallel code using partitioning, coalescing, and degenerative loop and guard removal
patent, July 2010
- Liao, Shih-wei; Du, Zhao Hui; Cheng, Bu Qi
- US Patent Document 7,757,222
Scanning polyhedra without Do-loops
conference, January 1998
- Boulet, P.; Feautrier, P.
- Proceedings. 1998 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.98EX192)
A data locality optimizing algorithm
journal, June 1991
- Wolf, Michael E.; Lam, Monica S.
- ACM SIGPLAN Notices, Vol. 26, Issue 6
Locality manager having memory and independent code, bus interface logic, and synchronization components for a processing element for intercommunication in a latency tolerant multiple processor
patent, March 1997
- Casavant, Thomas L.; Fineberg, Samuel A.; Bright, Devin L.
- US Patent Document 5,613,136
Cache miss equations: a compiler framework for analyzing and tuning memory behavior
journal, July 1999
- Ghosh, Somnath; Martonosi, Margaret; Malik, Sharad
- ACM Transactions on Programming Languages and Systems, Vol. 21, Issue 4
Scaling to the end of silicon with EDGE architectures
journal, July 2004
- Burger, D.; Keckler, S. W.; McKinley, K. S.
- Computer, Vol. 37, Issue 7
Automatic memory layout transformations to optimize spatial locality in parameterized loop nests
journal, March 2000
- Clauss, Philippe; Meister, Benoît
- ACM SIGARCH Computer Architecture News, Vol. 28, Issue 1
Deobfuscation: Reverse Engineering Obfuscated Code
conference, January 2005
- Udupa, S. K.; Debray, S. K.; Madou, M.
- 12th Working Conference on Reverse Engineering (WCRE'05)
Dynamic signature inspection-based network intrusion detection
patent, August 2001
- Vaidya, Vimal
- US Patent Document 6,279,113
Execution of hardware description language (HDL) programs
patent, July 2012
- Eng, Tommy K.
- US Patent Document 8,230,408
Arrangement in a network for passing control of distributed data between network nodes for optimized client access based on locality
patent, December 2009
- Turner, Bryan C.; Toebes, John
- US Patent Document 7,634,566
Integrated circuit apparatus and method for high throughput signature based network applications
patent-application, May 2005
- Barrie, Robert Matthew; Gould, Stephen; Williams, Darren
- US Patent Application 10/640870; 20050114700
Verifying safety properties of a class of infinite-state distributed algorithms
book, January 1995
- Jonsson, Bengt; Kempe, Lars; Goos, Gerhard
- Computer Aided Verification
An accurate cost model for guiding data locality transformations
journal, September 2005
- Vera, Xavier; Abella, Jaume; Llosa, Josep
- ACM Transactions on Programming Languages and Systems, Vol. 27, Issue 5
A simple graph-based intermediate representation
journal, March 1995
- Click, Cliff; Paleczny, Michael
- ACM SIGPLAN Notices, Vol. 30, Issue 3
Method of, system for, and computer program product for minimizing loop execution time by optimizing block/tile sizes
patent, September 1999
- Megiddo, Nimrod; Sarkar, Vivek
- US Patent Document 5,953,531
Searching for patterns in encrypted data
patent, August 1995
- Arnold, William C.; Chess, David M.; Kephart, Jeffrey O.
- US Patent Document 5,442,699
System and Method for Advanced Polyhedral Loop Transformations of Source Code in a Compiler
patent-application, March 2009
- Eichenberger, Alexandre E.; O'Brien, John K. P.; O'Brien, Kathryn M.
- US Patent Application 11/861449; 20090083724
Ultra-fast aliasing analysis using CLA: a million lines of C code in a second
journal, May 2001
- Heintze, Nevin; Tardieu, Olivier
- ACM SIGPLAN Notices, Vol. 36, Issue 5
Media for performing parallel processing of distributed arrays
patent, August 2012
- Luszczek, Piotr R.; Little, John N.; Martin, Jocelyn Luke
- US Patent Document 8,255,890
Impact of memory hierarchy on program partitioning and scheduling
conference, January 1995
- Kaplow, W. K.; Maniatty, W. A.; Szymanski, B. K.
- Twenty-Eighth Annual Hawaii International Conference on System Sciences, Proceedings of the Twenty-Eighth Hawaii International Conference on System Sciences
Two Fast Algorithms for Sparse Matrices: Multiplication and Permuted Transposition
journal, September 1978
- Gustavson, Fred G.
- ACM Transactions on Mathematical Software, Vol. 4, Issue 3
Method and system for memory management optimization
patent, October 2005
- Schreiber, Robert
- US Patent Document 6,952,821
Method and apparatus for a generic language interface to apply loop optimization transformations
patent-application, March 2006
- Blainey, Robert James; Tal, Arie
- US Patent Application 10/926601; 20060048121
Works referencing / citing this record:
System, methods and apparatus for program optimization for multi-threaded processor architectures
patent, January 2015
- Bastoul, Cedric; Lethin, Richard A.; Leung, Allen K.
- US Patent Document 8,930,926
System, methods and apparatus for program optimization for multi-threaded processor architectures
patent, January 2015
- Bastoul, Cedric; Lethin, Richard A.; Leung, Allen K.
- US Patent Document 8,930,926