Hardware support for software controlled fast multiplexing of performance counters
Abstract
Performance counters may be operable to collect one or more counts of one or more selected activities, and registers may be operable to store a set of performance counter configurations. A state machine may be operable to automatically select a register from the registers for reconfiguring the one or more performance counters in response to receiving a first signal. The state machine may be further operable to reconfigure the one or more performance counters based on a configuration specified in the selected register. The state machine yet further may be operable to copy data in selected one or more of the performance counters to a memory location, or to copy data from the memory location to the counters, in response to receiving a second signal. The state machine may be operable to store or restore the counter values and state machine configuration in response to a context switch event.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1082910
- Patent Number(s):
- 8347001
- Application Number:
- 12/684,429
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Salapura, Valentina, and Wisniewski, Robert W. Hardware support for software controlled fast multiplexing of performance counters. United States: N. p., 2013.
Web.
Salapura, Valentina, & Wisniewski, Robert W. Hardware support for software controlled fast multiplexing of performance counters. United States.
Salapura, Valentina, and Wisniewski, Robert W. Tue .
"Hardware support for software controlled fast multiplexing of performance counters". United States. https://www.osti.gov/servlets/purl/1082910.
@article{osti_1082910,
title = {Hardware support for software controlled fast multiplexing of performance counters},
author = {Salapura, Valentina and Wisniewski, Robert W.},
abstractNote = {Performance counters may be operable to collect one or more counts of one or more selected activities, and registers may be operable to store a set of performance counter configurations. A state machine may be operable to automatically select a register from the registers for reconfiguring the one or more performance counters in response to receiving a first signal. The state machine may be further operable to reconfigure the one or more performance counters based on a configuration specified in the selected register. The state machine yet further may be operable to copy data in selected one or more of the performance counters to a memory location, or to copy data from the memory location to the counters, in response to receiving a second signal. The state machine may be operable to store or restore the counter values and state machine configuration in response to a context switch event.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jan 01 00:00:00 EST 2013},
month = {Tue Jan 01 00:00:00 EST 2013}
}
Works referenced in this record:
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patent, October 1995
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- US Patent Document 5,463,761
Implementation-efficient multiple-counter value hardware performance counter
patent, September 2007
- Love, Carl E.; DeSota, Donald R.; Jeong, Jaeheon
- US Patent Document 7,272,754
Performance counters controlled by programmable logic
patent, August 2000
- Jouppi, Norman Paul; McCormack, Joel J.; Seiler, Larry
- US Patent Document 6,112,318