An Evaluation of Prototype Circuit Boards Assembled with a Sn-Ag Bi Solder
Abstract
An evaluation was performed which examined the aging of surface mount solder joints assembled with 91.84Sn-3.33Ag-4.83Bi solder. Defect analysis of the as-fabricated test vehicles revealed excellent solderability, good package alignment, and a minimum number of voids. Continuous DC electrical monitoring of the solder joints did not reveal opens during as many as 10,000 thermal cycles (0 C, 100 C). The solder joints exhibited no significant degradation through 2500 cycles, based upon an absence of microstructural damage and sustained shear and pull strengths of chip capacitors and J-leaded solder joints, respectively. Thermal cycles of 5000 and 10,000 resulted in some surface cracking of the solder fillets and coatings. In a few cases, deeper cracks were observed in the thinner reaches of several solder fillets. There was no deformation or cracking in the solder located in the gap between the package I/O and the circuit board pad nor in the interior of the fillets, both locations that would raise concerns of joint mechanical integrity. A drop in the chip capacitor shear strength was attributed to crack growth near the top of the fillet.
- Authors:
- Publication Date:
- Research Org.:
- Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Sandia National Lab. (SNL-CA), Livermore, CA (United States)
- Sponsoring Org.:
- US Department of Energy (US)
- OSTI Identifier:
- 13984
- Report Number(s):
- SAND99-2273C
TRN: AH200135%%525
- DOE Contract Number:
- AC04-94AL85000
- Resource Type:
- Conference
- Resource Relation:
- Conference: IPCWorks '99 Conference, Minneapolis, MN (US), 10/25/1999--10/27/1999; Other Information: PBD: 1 Sep 1999
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING; 36 MATERIALS SCIENCE; AGING; CAPACITORS; COATINGS; CRACK PROPAGATION; DEFECTS; EVALUATION; MONITORING; SHEAR PROPERTIES; PRINTED CIRCUITS; METALLURGICAL FLUX; SOLDERED JOINTS; THERMAL CYCLING
Citation Formats
ARTAKI, I, RAY, U, REJENT, JEROME A, and VIANCO, PAUL T. An Evaluation of Prototype Circuit Boards Assembled with a Sn-Ag Bi Solder. United States: N. p., 1999.
Web.
ARTAKI, I, RAY, U, REJENT, JEROME A, & VIANCO, PAUL T. An Evaluation of Prototype Circuit Boards Assembled with a Sn-Ag Bi Solder. United States.
ARTAKI, I, RAY, U, REJENT, JEROME A, and VIANCO, PAUL T. 1999.
"An Evaluation of Prototype Circuit Boards Assembled with a Sn-Ag Bi Solder". United States. https://www.osti.gov/servlets/purl/13984.
@article{osti_13984,
title = {An Evaluation of Prototype Circuit Boards Assembled with a Sn-Ag Bi Solder},
author = {ARTAKI, I and RAY, U and REJENT, JEROME A and VIANCO, PAUL T},
abstractNote = {An evaluation was performed which examined the aging of surface mount solder joints assembled with 91.84Sn-3.33Ag-4.83Bi solder. Defect analysis of the as-fabricated test vehicles revealed excellent solderability, good package alignment, and a minimum number of voids. Continuous DC electrical monitoring of the solder joints did not reveal opens during as many as 10,000 thermal cycles (0 C, 100 C). The solder joints exhibited no significant degradation through 2500 cycles, based upon an absence of microstructural damage and sustained shear and pull strengths of chip capacitors and J-leaded solder joints, respectively. Thermal cycles of 5000 and 10,000 resulted in some surface cracking of the solder fillets and coatings. In a few cases, deeper cracks were observed in the thinner reaches of several solder fillets. There was no deformation or cracking in the solder located in the gap between the package I/O and the circuit board pad nor in the interior of the fillets, both locations that would raise concerns of joint mechanical integrity. A drop in the chip capacitor shear strength was attributed to crack growth near the top of the fillet.},
doi = {},
url = {https://www.osti.gov/biblio/13984},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Wed Sep 01 00:00:00 EDT 1999},
month = {Wed Sep 01 00:00:00 EDT 1999}
}