Multiple processor accelerator for logic simulation

Patent · Tue Oct 17 00:00:00 EDT 1989

OSTI ID:7252075

Catlin, G M

This patent describes a computer system coupled to a plurality of users for implementing an event driven algorithm of each of the users. It comprises: a master processor coupled to the users for providing overall control of the computer system and executing the event driven algorithm of each of the users, the master processor further including a master memory; a unidirectional ring bus coupled to the master processor; a plurality of processor modules; an interprocessor bus coupled to the plurality of processors within the module for transferring the simulation data among the processors; and an interface means.

• Assignee: Daisy Systems Corp., Mountain View, CA
• Patent Number(s): US 4873656
• Application Number: PPN: US 7-067633A
• OSTI ID: 7252075
• Resource Relation: Patent File Date: 26 Jun 1987
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
ARRAY PROCESSORS
COMPUTERIZED SIMULATION
ALGORITHMS
SUPERCOMPUTERS
PARALLEL PROCESSING
COMPUTER ARCHITECTURE
EXECUTIVE CODES
MEMORY MANAGEMENT
COMPUTER CODES
COMPUTERS
DIGITAL COMPUTERS
MATHEMATICAL LOGIC
PROGRAMMING
SIMULATION
990200* - Mathematics & Computers