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Title: Domain wall enabled steep slope switching in MoS2 transistors towards hysteresis-free operation

Journal Article · · npj 2D Materials and Applications

The device concept of ferroelectric-based negative capacitance (NC) transistors offers a promising route for achieving energy-efficient logic applications that can outperform the conventional semiconductor technology, while viable operation mechanisms remain a central topic of debate. In this work, we report steep slope switching in MoS2 transistors back-gated by single-layer polycrystalline PbZr0.35Ti0.65O3. The devices exhibit current switching ratios up to 8 × 106 within an ultra-low gate voltage window of Vg = ±0.5 V and subthreshold swing (SS) as low as 9.7 mV decade–1 at room temperature, transcending the 60 mV decade–1 Boltzmann limit without involving additional dielectric layers. Theoretical modeling reveals the dominant role of the metastable polar states within domain walls in enabling the NC mode, which is corroborated by the relation between SS and domain wall density. Our findings shed light on a hysteresis-free mechanism for NC operation, providing a simple yet effective material strategy for developing low-power 2D nanoelectronics.

Research Organization:
Univ. of Pennsylvania, Philadelphia, PA (United States); Univ. of Nebraska, Lincoln, NE (United States)
Sponsoring Organization:
USDOE Office of Artificial Intelligence and Technology (AITO); USDOE Office of Science (SC), Basic Energy Sciences (BES); National Science Foundation (NSF)
Grant/Contract Number:
FG02-07ER46431; SC0016153; OIA-1538893; 1542182
OSTI ID:
1896535
Alternate ID(s):
OSTI ID: 1867824; OSTI ID: 1962471
Journal Information:
npj 2D Materials and Applications, Journal Name: npj 2D Materials and Applications Vol. 6 Journal Issue: 1; ISSN 2397-7132
Publisher:
Nature Publishing GroupCopyright Statement
Country of Publication:
United Kingdom
Language:
English

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