skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Thin Film Characterization on Cu/SnAg Solder Interface for 3D Packaging Technologies

Journal Article · · MRS Advances
DOI:https://doi.org/10.1557/adv.2020.309· OSTI ID:1668694
 [1];  [2];  [3]
  1. Univ. of Florida, Gainesville, FL (United States); Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
  2. Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
  3. Univ. of Florida, Gainesville, FL (United States)

Copper is a commonly used interconnect metal in microelectronic interconnects due to its exceptional electrical and thermal properties. Particularly in applications of the 2.5 and 3D integration, Cu is utilized in through-silicon-vias (TSVs) and flip chip interconnects between microelectronic chips for providing miniaturization, lower power and higher performance than current 2D packaging approaches. Furthermore, SnAg capped Cu pillars are a common high-density interconnect technology for flip chip bonding. For these interconnects, specific properties of the Cu surface, such as roughness and cleanliness, are an important factor in the process to ensure quality solder bumps. During electroplating, tight processing parameters must be met so that defects are avoided, and high bump uniformity is achieved. An understanding of the interactions at the solder and Cu pillar interface is needed, based on the electroplating parameters, to determine the best method for populating solder on the wafer surface. In this study, surface treatment techniques such as oxygen plasma cleaning were performed on the Cu surfaces and the SnAg plating chemistry for depositing the solder were evaluated through hull cell testing to qualitatively determine the range of current densities to investigate. It was observed that current density while plating played a large role in solder bump deposition morphology. At the higher current densities greater than 60 mA/cm2, bump height non-uniformity and dendritic growth are observed and at lower current densities, less than or equal to 60 mA/cm2, uniform, continuous bump height occurred.

Research Organization:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Organization:
USDOE National Nuclear Security Administration (NNSA)
Grant/Contract Number:
AC04-94AL85000; NA0003525
OSTI ID:
1668694
Report Number(s):
SAND-2020-5507J; 686345
Journal Information:
MRS Advances, Vol. 5, Issue 37-38; ISSN 2059-8521
Publisher:
Materials Research Society (MRS)Copyright Statement
Country of Publication:
United States
Language:
English

References (4)

Controlled Collapse Reflow Chip Joining journal May 1969
Evaluation of lead-free SnAg solder ball deposition and reflow processes for flip chip applications journal December 2005
High aspect ratio copper through-silicon-vias for 3D integration journal October 2008
A Fundamental Approach to Electrochemical Analyses on Chemically Modified Thin Films for Barrier CMP Optimization journal January 2019

Similar Records

A wet chemistry approach to sub-micron, removable flip chip interconnects.
Conference · Fri Aug 01 00:00:00 EDT 2008 · OSTI ID:1668694

Reliability Investigations on SnAg Bumps on Substrate Pads with Different Pad Finish
Journal Article · Tue Feb 07 00:00:00 EST 2006 · AIP Conference Proceedings · OSTI ID:1668694

Effect of current crowding and Joule heating on electromigration-induced failure in flip chip composite solder joints tested at room temperature
Journal Article · Fri Jul 01 00:00:00 EDT 2005 · Journal of Applied Physics · OSTI ID:1668694

Related Subjects