Fault Tolerance for Persistent Main Memory
|
patent-application
|
May 2016 |
Efficient virtual memory for big memory servers
|
journal
|
July 2013 |
Implicit Sharing in Storage Management
|
patent-application
|
June 2017 |
Integrated Sizing, Layout, and Extractor Tool for Circuit Design
|
patent-application
|
May 2008 |
Implicit sharing in storage management
|
patent
|
February 2018 |
Address translation unit for translation of virtual address to real address using translation tables of multi-level hierarchical structure
|
patent
|
December 1988 |
Mechanisms to save user/kernel copy for cross device communications
|
patent
|
September 2016 |
Storage Device and Storage Virtualization System
|
patent-application
|
February 2017 |
Graphics engine with isochronous context switching
|
patent
|
May 2004 |
A memory hierarchy-aware metadata management technique for Solid State Disks
|
conference
|
August 2011 |
Translation bypass in multi-stage address translation
|
patent
|
December 2015 |
Secure virtual access for real-time embedded devices
|
patent
|
January 2019 |
RDMA copy-on-write
|
patent
|
November 2010 |
Pooled Memory Address Translation
|
patent-application
|
September 2016 |
Sharing executable modules between user and kernel threads
|
patent
|
February 2002 |
Hybrid TLB Coalescing
|
conference
|
June 2017 |
Scheduling method and multi-core processor system
|
patent
|
June 2016 |
Redundant memory mappings for fast access to large memories
|
conference
|
June 2015 |
Mitigating eviction by maintaining mapping tables
|
patent
|
August 2015 |
Dynamic Address Translation with Fetch Protection
|
patent-application
|
July 2009 |
Storing Secure Mode Page Table Data in Secure and Non-Secure Regions of Memory
|
patent-application
|
August 2011 |
Range Translations for Fast Virtual Memory
|
journal
|
May 2016 |
System and method for performing incremental initialization of a master runtime system process
|
patent
|
March 2008 |
In-Memory Lightweight Coherency
|
patent-application
|
November 2015 |
Protected regions
|
patent
|
October 2018 |
Content-based, transparent sharing of memory units
|
patent
|
September 2004 |
Coherent Multi-Processing System
|
patent-application
|
January 2005 |
Reclaiming Existing Fields in Address Translation Data Structures to Extend Control over Memory Access
|
patent-application
|
June 2004 |
Multi-Threaded Memory Management
|
patent-application
|
September 2014 |
Apparatus and Method for Memory Address Translation Across Multiple Nodes
|
patent-application
|
April 2009 |
Execution context trace for asynchronous tasks
|
patent
|
February 2017 |
Enhancing performance by pre-fetching and caching data directly in a communication processor's register set
|
patent
|
November 2004 |
Mid-thread pre-emption with software assisted context switch
|
patent
|
June 2018 |
Page-Based Prefetching Triggered by TLB Activity
|
patent-application
|
June 2017 |
Efficient memory virtualization for Cross-ISA system mode emulation
|
journal
|
March 2014 |
Apparatus and Method for Operating a Virtually Indexed Physically Tagged Cache
|
patent-application
|
April 2017 |
Apparatuses, Systems, and Methods for Reducing Translation Lookaside Buffer (TLB) Lookups
|
patent-application
|
June 2011 |
Intelligent Resource Management in Multiprocessor Computer Systems
|
patent-application
|
October 2008 |
Storage access authorization controls in a computer system using dynamic translation of large addresses
|
patent
|
November 1996 |
System and Method for Repurposing Dead Cache Blocks
|
patent-application
|
March 2016 |
Using a shared last-level TLB to reduce address-translation latency
|
patent
|
July 2015 |
Method and System for Work Scheduling in a Multi-Chip System
|
patent-application
|
September 2015 |
Using a Translation Lookaside Buffer to Manage Protected Micro-Contexts
|
patent-application
|
July 2009 |
Using a Shared Last-Level TLB to Reduce Address-Translation Latency
|
patent-application
|
February 2014 |
Using Broadcast-Based TLB Sharing to Reduce Address-Translation Latency in a Shared-Memory System with Optical Interconnect
|
patent-application
|
October 2015 |
Reverse copy on write for better cache utilization
|
patent
|
October 2016 |
Forcing registered code into an execution context of guest software
|
patent
|
August 2012 |
Creating NoSQL Database Index for Semi-Structured Data
|
patent-application
|
July 2015 |
Collapsed address translation with multiple page sizes
|
patent
|
May 2017 |
Secure gateway interconnection in an e-commerce based environment
|
patent
|
March 2004 |
I/O memory management unit including multilevel address translation for I/O and computation offload
|
patent
|
February 2013 |
Migrating groups of threads across NUMA nodes based on remote page access frequency
|
patent
|
February 2014 |
Execution context swap between heterogeneous functional hardware units
|
patent
|
February 2016 |
Low-overhead operating systems
|
patent
|
December 2012 |
Method and Apparatus for Co-Verification of Digital Designs
|
patent-application
|
June 2005 |
Remote Memory Access Functionality in a Cluster of Data Processing Nodes
|
patent-application
|
August 2016 |
Network Server Card and Method for Handling Requests Received via a Network Interface
|
patent-application
|
February 2002 |
System and Method of Protecting Metadata from NAND Flash Failures
|
patent-application
|
December 2012 |
Context pipelines
|
patent
|
February 2007 |
Merged TLB structure for multiple sequential address translations
|
patent
|
May 2017 |
Data Processing
|
patent-application
|
May 2018 |
Method for Use of Ternary CAM to Implement Software Programmable Cache Policies
|
patent-application
|
October 2004 |
Virtual Memory Management System with Reduced Latency
|
patent-application
|
July 2014 |
Method and apparatus for rapidly switching processes in a computer system
|
patent
|
November 1994 |
Using broadcast-based TLB sharing to reduce address-translation latency in a shared-memory system with optical interconnect
|
patent
|
January 2016 |
Data processing apparatus, and a method of handling address translation within a data processing apparatus
|
patent
|
November 2018 |
Mobility Device Platform
|
patent-application
|
November 2006 |
Building and Querying Hash Tables on Processors
|
patent-application
|
October 2015 |
Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer
|
patent
|
May 2008 |
Isolating data within a computer system using private shadow mappings
|
patent
|
March 2016 |
Data processing apparatus and method for controlling access to a memory having a plurality of memory locations for storing data values
|
patent
|
February 2000 |
Transparent checkpointing and process migration in a distributed system
|
patent
|
September 2015 |
Cryptographic multi-shadowing with integrity verification
|
patent
|
August 2017 |
Process migration
|
patent
|
March 2009 |
Maintenance of cache and tags in a translation lookaside buffer
|
patent
|
February 2016 |
Multiple page-size translation lookaside buffer
|
patent
|
June 2017 |
Processing device with address translation probing and methods
|
patent
|
March 2015 |
Managing translations across multiple contexts using a TLB with entries directed to multiple privilege levels and to multiple types of address spaces
|
patent-application
|
October 2015 |
Multi-Core Processor System, Synchronization Control System, Synchronization Control Apparatus, Information Generating Method, and Computer Product
|
patent-application
|
July 2013 |
Efficient, Scalable and High Performance Mechanism for Handling IO Requests
|
patent-application
|
September 2009 |
Hardware Accelerated Virtual Context Switching
|
patent-application
|
May 2016 |
Guest ordering of host file system writes
|
patent
|
December 2017 |
Data Processing
|
patent-application
|
May 2018 |
Hardware-based multi-threading for packet processing
|
patent
|
February 2010 |
CloudNet: Dynamic Pooling of Cloud Resources by Live WAN Migration of Virtual Machines
|
journal
|
October 2015 |
Optimizing Fine Grained Context Addressability in Highly Dimensional Environments Using TCAM Hybrid Memory and Storage Architectures
|
patent-application
|
May 2017 |
Address control system for software simulation
|
patent
|
August 1982 |
Duplicate snoop tags partitioned across multiple processor/cache chips in a multi-processor system
|
patent
|
May 2007 |
Combining a Remote TLB Lookup and a Subsequent Cache Miss Into a Single Coherence Operation
|
patent-application
|
January 2014 |
Apparatus, method, and instruction for software management of multiple computational contexts in a multithreaded microprocessor
|
patent
|
September 2008 |
System and Method for Supporting Finer-Grained Copy-on-Write Page Sizes
|
patent-application
|
August 2013 |
Multiprocessor System that Supports Both Coherent and Non-Coherent Memory Accesses
|
patent-application
|
August 2007 |
Dance/multitude concurrent computation
|
patent
|
February 1999 |
Maintaining versions of data in solid state memory
|
patent
|
August 2015 |
Virtual machine monitors for scalable multiprocessors
|
patent
|
June 2000 |
Virtual Memory Page Mapping Overlays
|
patent-application
|
November 2017 |
Distributed Cache Coherence at Scalable Requestor Filter Pipes That Accumulate Invalidation Acknowledgements from Other Requestor Filter Pipes Using Ordering Messages from Central Snoop Tag
|
patent-application
|
August 2007 |
Data Processing
|
patent-application
|
May 2018 |
Secure Memory Accesses on Networks-on-Chip
|
journal
|
September 2008 |
Processing pipeline in a base services pattern environment
|
patent
|
March 2004 |
Region Probe Filter for Distributed Memory System
|
patent-application
|
June 2017 |
Translation entry invalidation in a multithreaded data processing system
|
patent
|
October 2017 |
Method and apparatus for performing address translation in a computer system
|
patent
|
April 2008 |
System and Method for Providing Cache-Aware Lightweight Producer Consumer Queues
|
patent-application
|
November 2014 |
Reducing Over-Purging of Structures Associated with Address Translation Using an Array of Tags
|
patent-application
|
January 2018 |
Method and apparatus for simulation of data in a virtual environment using a queued direct input-output device
|
patent
|
February 2002 |
Infinite memory fabric hardware implementation with router
|
patent
|
February 2018 |
Translation look-aside buffer including a single page size translation unit
|
patent
|
May 1998 |
Managing use of storage by multiple pageable guests of a computing environment
|
patent
|
May 2012 |
A hybrid shared memory heterogeneous execution platform for PCIe-based GPGPUs
- Shukla, Sambit K.; Bhuyan, Laxmi N.
-
2013 20th International Conference on High Performance Computing (HiPC), 20th Annual International Conference on High Performance Computing
https://doi.org/10.1109/HiPC.2013.6799140
|
conference
|
December 2013 |
System and Method for Managing Cache Coherence in a Network of Processors Provided with Cache Memories
|
patent-application
|
April 2015 |
Decoupled hardware support for distributed shared memory
|
journal
|
May 1996 |
Multi-petascale highly efficient parallel supercomputer
|
patent
|
July 2015 |
Translation lookaside buffer apparatus and method with input/output entries, page table entries and page table pointers
|
patent
|
June 1995 |
Memory Mirroring Apparatus and Method
|
patent-application
|
December 2006 |
Method, System and Program Product for Address Translation through an Intermediate Address Space
|
patent-application
|
April 2009 |
Delayed allocation for data object creation
|
patent
|
February 2018 |
Controlling access to multiple memory zones in an isolated execution environment
|
patent
|
October 2003 |
Registers for data transfers
|
patent
|
October 2008 |
Microprocessor Including a Configurable Translation Lookaside Buffer
|
patent-application
|
December 2006 |
Apparatus and Method for Simplified Microparallel Computation
|
patent-application
|
May 2011 |
Custom Caching
|
patent-application
|
July 2005 |
System supporting multiple partitions with differing translation formats
|
patent
|
February 2016 |
Evaluation of delta compression techniques for efficient live migration of large virtual machines
- Svärd, Petter; Hudzia, Benoit; Tordsson, Johan
-
Proceedings of the 7th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments - VEE '11
https://doi.org/10.1145/1952682.1952698
|
conference
|
January 2011 |
Distributed Virtual Multiprocessor
|
patent-application
|
December 2005 |
Suspending, migrating and resuming HPC virtual clusters
|
journal
|
October 2010 |
Copy-on-write update-triggered consistency
|
patent
|
March 2019 |
Method of cloning data in a memory for a virtual machine, product of computer programs and computer system therewith
|
patent
|
May 2016 |
Method of Cloning Data in a Memory for a Virtual Machine, Product of Computer Programs and Computer System Therewith
|
patent-application
|
January 2014 |
Indexing Entries of a Storage Structure Shared between Multiple Threads
|
patent-application
|
October 2017 |
Graphics Processing
|
patent-application
|
August 2017 |
Systems and methods exchanging data between processors through concurrent shared memory
|
patent
|
March 2014 |
System and method for managing table lookaside buffer performance
|
patent
|
December 2008 |
Systems, methods and devices for work placement on processor cores
|
patent
|
July 2018 |
Processor apparatus and multithread processor apparatus
|
patent
|
September 2014 |
Memory Addressing for a Virtual Machine Implementation on a Computer Processor Supporting Virtual Hash-Page-Table Searching
|
patent-application
|
April 2004 |