High-speed test station for solid-state imagers
- Los Alamos National Lab., NM (United States)
- Lawrence Berkeley Lab., CA (United States)
A PC-based programmable solid-state imager test station has been designed and is in final development phases. It is designed to provide a flexible universal high-speed platform for evaluation of different imager designs and formats including various multiport configurations. The system provides drive and acquisition circuitry and components to allow electro-optic characterization of imagers as a function of pixel readout rate. The data are scan-converted to RS- 170 format for analysis. The system`s functional capabilities and performance are presented. Examples of program code to generate three phase clocks for an 8-port Frame Transfer EEV CCD are included. A sampling of preliminary results obtained from variable rate clocking of this imager will be discussed.
- Research Organization:
- Los Alamos National Lab., NM (United States)
- Sponsoring Organization:
- USDOE, Washington, DC (United States)
- DOE Contract Number:
- W-7405-ENG-36; AC03-76SF00098
- OSTI ID:
- 10169527
- Report Number(s):
- LA-UR-92-2352; CONF-920792-19; ON: DE92018990
- Resource Relation:
- Conference: 37. annual Society of Photo-Optical Instrumentation Engineers (SPIE) international symposium on optical and optoelectronic applied science and engineering,San Diego, CA (United States),19-24 Jul 1992; Other Information: PBD: [1992]
- Country of Publication:
- United States
- Language:
- English
Similar Records
Characterization of multiport solid state imagers at megahertz data rates
Multiport solid-state imager characterization at variable pixel rates
Related Subjects
42 ENGINEERING
NUCLEAR EXPLOSION DETECTION
IMAGE PROCESSING
DATA TRANSMISSION SYSTEMS
TESTING
CHARGE-COUPLED DEVICES
DIGITIZERS
FUNCTION GENERATORS
ULTRAHIGH-SPEED PHOTOGRAPHY
DESIGN
DATA ACQUISITION SYSTEMS
450300
426000
COMPONENTS
ELECTRON DEVICES AND CIRCUITS