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Title: A hardware overview of the RHIC LLRF platform

Conference ·
OSTI ID:1016656

The RHIC Low Level RF (LLRF) platform is a flexible, modular system designed around a carrier board with six XMC daughter sites. The carrier board features a Xilinx FPGA with an embedded, hard core Power PC that is remotely reconfigurable. It serves as a front end computer (FEC) that interfaces with the RHIC control system. The carrier provides high speed serial data paths to each daughter site and between daughter sites as well as four generic external fiber optic links. It also distributes low noise clocks and serial data links to all daughter sites and monitors temperature, voltage and current. To date, two XMC cards have been designed: a four channel high speed ADC and a four channel high speed DAC. The new LLRF hardware was used to replace the old RHIC LLRF system for the 2009 run. For the 2010 run, the RHIC RF system operation was dramatically changed with the introduction of accelerating both beams in a new, common cavity instead of each ring having independent cavities. The flexibility of the new system was beneficial in allowing the low level system to be adapted to support this new configuration. This hardware was also used in 2009 to provide LLRF for the newly commissioned Electron Beam Ion Source.

Research Organization:
Brookhaven National Lab. (BNL), Upton, NY (United States). Relativistic Heavy Ion Collider (RHIC)
Sponsoring Organization:
DOE - OFFICE OF SCIENCE
DOE Contract Number:
DE-AC02-98CH10886
OSTI ID:
1016656
Report Number(s):
BNL-94220-2011-CP; R&D Project: KBCH139; 18034; KB0202011; TRN: US1103099
Resource Relation:
Conference: 2011 Particle Accelerator Conference (PAC'11); New York, NY; 20110328 through 20110401
Country of Publication:
United States
Language:
English